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Research at St Andrews

Lattice-based scheduling for multi-FPGA systems

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Author(s)

Teng Yu, Bo Feng, Mark Stillwell, Liucheng Guo, Yuchun Ma, John Donald Thomson

School/Research organisations

Abstract

Accelerators are becoming increasingly prevalent in distributed computation. FPGAs have been shown to be fast and power efficient for particular tasks, yet scheduling on FPGA-based multi-accelerator systems is challenging when workloads vary significantly in granularity in terms of task size and/or number of computational units required. We present a novel approach for dynamically scheduling tasks on networked multi-FPGA systems which maintains high performance, even in the presence of irregular tasks. Our topological ranking-based scheduling allows realistic irregular workloads to be processed while maintaining a significantly higher level of performance than existing schedulers.
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Details

Original languageEnglish
Title of host publicationProceedings of the International Conference on Field-Programmable Technology 2018, Naha, Okinawa, Japan
PublisherIEEE Press
StatePublished - 10 Dec 2018
EventInternational Conference on Field-Programmable Technology (FPT'18) - Naha, Okinawa, Japan
Duration: 10 Dec 201814 Dec 2018
http://www.fpt18.sakura.ne.jp/

Conference

ConferenceInternational Conference on Field-Programmable Technology (FPT'18)
Abbreviated titleFPT'18
CountryJapan
CityNaha, Okinawa
Period10/12/1814/12/18
Internet address

    Research areas

  • Runtime scheduling, Lattice, Representation, Multi-FPGA

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ID: 256719143